Modern integrated circuits are mainly manufactured on semiconductor wafers. Tens, hundreds, or even thousands of identical circuits can be built in a single wafer. Usually dozens of wafers can be manufactured at one time. Once fabricated, the integrated circuits are diced or separated into individual dies and packaged into the final devices. The individual devices are then tested or screened and the devices that fail a test or specification are rejected.
During the manufacturing process, certain processing steps can cause variation or shading of certain characteristics across a wafer. The variation or shading can compromise the performance of the circuits and cause the device to fail a test or specification. This failure reduces the manufacturing yield.
For example, the thickness of a conductive layer, etch uniformity, or the doping concentration of an impurity can vary in the dies based on the location of the dies in the wafer due to the variation or shading of process steps. Usually dies in the wafer center can have different characteristics of certain parameters than the dies on the wafer edge. Dies on the wafer top can have different characteristics from the dies on the wafer bottom. Being able to determine the location of a die in the wafer along with its failure mechanism can help in identifying the cause of a failure and in making improvements in the manufacturing process to reduce the failure rate. But after a semiconductor wafer is diced and packaged, the information regarding the location of an individual die relative to the wafer is lost.